Jensen Huang emphasizes that Moore's Law is dead as a primary performance driver. The 50x gain from Hopper to Blackwell came overwhelmingly from architecture and computer science breakthroughs, with raw transistor improvements providing only marginal benefit.

The dream of hardware optimized for functional programming (e.g., dataflow or SK combinator machines) proved to be a mistake. These machines were essentially hardware-based interpreters. The better approach is to build a sophisticated compiler that translates functional code into efficient instructions for general-purpose CPUs.

To compete with the speed of RISC architectures, Intel's CISC-based x86 processors adopted a hybrid approach. They internally translate complex x86 instructions into simpler, RISC-like instructions for execution, gaining performance benefits while maintaining crucial backward compatibility.

In the AI era, performance demands have forced a move away from siloed development. Hardware and software teams must now design in tandem, making mutual compromises to optimize the final product. This simultaneous process is a significant and relatively new shift from the traditional layered approach.

While Moore's Law continued adding transistors, the failure of Dennard scaling around 2005 meant they no longer became more power-efficient. This created a "power wall," making single cores too hot and forcing the industry to use multiple, simpler cores to continue performance gains.

True co-design between AI models and chips is currently impossible due to an "asymmetric design cycle." AI models evolve much faster than chips can be designed. By using AI to drastically speed up chip design, it becomes possible to create a virtuous cycle of co-evolution.

Instead of using high-level compilers like Triton, elite programmers design algorithms based on specific hardware properties (e.g., AMD's MI300X). This bottom-up approach ensures the code fully exploits the hardware's strengths, a level of control often lost through abstractions like Triton.

The multiplexer (MUX) circuits required to select and move data from a register file to a logic unit can consume significantly more silicon area than the logic unit performing the actual calculation. This illustrates that data movement is a dominant cost, even at the micro-architectural level.

Despite the x86 (CISC) architecture's long reign in PCs, the proliferation of ARM-based (RISC) chips in mobile and other devices means RISC architectures now account for 99% of all processors, effectively winning the historic debate.