Counterintuitively, the "move fast and break things" mantra fails in hardware. Mock Industries achieved a 71-day aircraft development cycle not by rushing tests, but by investing heavily in software and hardware-in-the-loop simulation to run thousands of virtual cases before the first physical flight.

The engineering process evolved from physical prototypes to digital simulations. AI models now represent a third leap, accelerating design iterations from days to minutes. This allows for exploring thousands of options instead of dozens, drastically shortening development cycles.

The impact of AI isn't limited to software. Hardware development is being accelerated, allowing a small 7-person team at Hop Aero to achieve the development velocity of a company with 50-70 engineers.

True co-design between AI models and chips is currently impossible due to an "asymmetric design cycle." AI models evolve much faster than chips can be designed. By using AI to drastically speed up chip design, it becomes possible to create a virtuous cycle of co-evolution.

AI agents review "engineering change orders"—the hardware equivalent of software pull requests—to flag risks and compliance gaps early. This "shift left" approach prevents costly downstream errors in physical products, where fixes are exponentially more expensive than a software patch and can involve factory recalls.

The most significant aspect of OpenAI's Jalapeno chip isn't its performance but its rapid nine-month 'tape out' time. This demonstrates that using AI models to design hardware can dramatically shorten development cycles, creating a new competitive advantage based on iteration speed.

The current 2-3 year chip design cycle is a major bottleneck for AI progress, as hardware is always chasing outdated software needs. By using AI to slash this timeline, companies can enable a massive expansion of custom chips, optimizing performance for many at-scale software workloads.

Contrary to popular belief, the longest phase in the 24-36 month chip development cycle isn't the architectural design. It's the verification, validation, and debugging phase. This is where AI tools are providing the most significant productivity gains for engineers.

The multi-year process of designing a chip forces engineers to 'bloat' designs with features that may or may not be needed years later, treating them as an insurance policy against market shifts. This increases cost and complexity. AI-accelerated design collapses this timeline, reducing uncertainty and enabling more focused, efficient hardware.