The performance gains from Nvidia's Hopper to Blackwell GPUs come from increased size and power, not efficiency. This signals a potential scaling limit, creating an opportunity for radically new hardware primitives and neural network architectures beyond today's matrix-multiplication-centric models.

For two decades, silicon chips have been thermally constrained to a power density of about 1 watt per square millimeter. New R&D efforts are finally overcoming this barrier, which could lead to smaller, more powerful chips, despite significant thermal and electrical engineering challenges.

Breakthroughs like neural network "pruning" can reduce model size by 90% without losing accuracy, offering a 10x reduction in inference costs. This highlights that algorithmic innovation, not just acquiring more hardware, will be a key competitive vector in the AI race, enabling more output with less energy.

When power (watts) is the primary constraint for data centers, the total cost of compute becomes secondary. The crucial metric is performance-per-watt. This gives a massive pricing advantage to the most efficient chipmakers, as customers will pay anything for hardware that maximizes output from their limited power budget.

Contrary to the theory that a nation could achieve AGI by using vast amounts of cheap energy to power older chips, evidence shows this is not viable. All frontier models to date have been trained on the most advanced semiconductor nodes (5nm or less), indicating that architectural efficiency is a non-negotiable requirement.

While most focus on building more power infrastructure to meet AI's energy needs, the truly disruptive innovation may come from creating chips and models that are massively more energy-efficient. This contrarian view suggests the real investment opportunity might be in demand-side technology, not just supply-side energy production.

The GPU architecture is economically optimized for slow AI inference, offering a very low cost per token. However, this efficiency plummets when speed is required, as the cost and power per token increase exponentially, creating a market for alternative architectures in high-speed applications.

The intense power demands of AI inference will push data centers to adopt the "heterogeneous compute" model from mobile phones. Instead of a single GPU architecture, data centers will use disaggregated, specialized chips for different tasks to maximize power efficiency, creating a post-GPU era.

While power supply is a current data center bottleneck, a more significant long-term risk is technological disruption. Chip innovations promising 10-1000x more power efficiency could make today's massive, power-centric data center investments obsolete or oversized before they are fully utilized.