The next wave of AI silicon may pivot from today's compute-heavy architectures to memory-centric ones optimized for inference. This fundamental shift would allow high-performance chips to be produced on older, more accessible 7-14nm manufacturing nodes, disrupting the current dependency on cutting-edge fabs.

TSMC's new Arizona factory can produce NVIDIA's advanced chips, but this doesn't solve US supply chain dependency. The chips must still be shipped back to Taiwan for the critical advanced packaging stage, meaning the primary bottleneck remains firmly in Asia despite onshoring manufacturing.

The Rubin family of chips is sold as a complete "system as a rack," meaning customers can't just swap out old GPUs. This technical requirement creates a forced, expensive upgrade cycle for cloud providers, compelling them to invest heavily in entirely new rack systems to stay competitive.

New AI models are designed to perform well on available, dominant hardware like NVIDIA's GPUs. This creates a self-reinforcing cycle where the incumbent hardware dictates which model architectures succeed, making it difficult for superior but incompatible chip designs to gain traction.

While competitors chased cutting-edge physics, AI chip company Groq used a more conservative process technology but loaded its chip with on-die memory (SRAM). This seemingly less advanced but different architectural choice proved perfectly suited for the "decode" phase of AI inference, a critical bottleneck that led to its licensing deal with NVIDIA.

For a hyperscaler, the main benefit of designing a custom AI chip isn't necessarily superior performance, but gaining control. It allows them to escape the supply allocations dictated by NVIDIA and chart their own course, even if their chip is slightly less performant or more expensive to deploy.

TSMC's "pure-play foundry" model, where it only manufactures chips and doesn't design its own, builds deep trust. Customers like Apple and NVIDIA can share sensitive designs without fear of competition, unlike with rivals Intel and Samsung who have their own chip products.

True co-design between AI models and chips is currently impossible due to an "asymmetric design cycle." AI models evolve much faster than chips can be designed. By using AI to drastically speed up chip design, it becomes possible to create a virtuous cycle of co-evolution.

Google created its custom TPU chip not as a long-term strategy, but from an internal crisis. Engineer Jeff Dean calculated that scaling a new speech recognition feature to all Android phones would require doubling Google's entire data center footprint, forcing the company to design a more efficient, custom chip to avoid existential costs.